Efficient Implementation of Boolean Logic Functions Using Double Gate Charge-Trapping Memory for In-Memory Computing

IEEE TRANSACTIONS ON ELECTRON DEVICES(2024)

引用 0|浏览1
暂无评分
摘要
In this work, we have utilized a vertical double gate (DG) charge-trapping memory (CTM) to implement Boolean logic functions for in-memory computing (IMC). IMC architecture is an efficient and revolutionary computing paradigm that can overcome the limitations of von Neumann's computing. The independent gate operation of the device successfully implements the in-memory logic functions such as AND, OR, NAND, and NOR in two steps, namely, program and read operations. Moreover, the proposed method with a DG efficiently implements the XOR and XNOR operations. Furthermore, the device is simulated with high- kappa kappa material (Al2O3 ) as blocking oxide to reduce the time and voltage for low energy consumption. The DG-CTM consumes similar to 22.5 fJ to implement the AND Boolean logic function. The two-step reliable and low power consumption process Fowler-Nordheim (FN tunneling) makes the device promising for next-generation IMC systems.
更多
查看译文
关键词
Boolean function implementation,charge trapping memory (CTM),double gate (DG),Fowler-Nordheim (FN),nonvolatile,SONOS
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要