A $-$ 64.3 dB THD, 26 nV/ $\surd$ Hz Bio-Potential Readout Analog-Front-End Amplifier With a Gm-C Integrator-Implanted DC Servo Loop, and a Bulk-Driven Ripple Reduction Loop

This paper presents a $G_{m}$ -C integrator-implanted DC servo loop (GMCI $^{2}$ -DSL) and a bulk-driven ripple reduction loop (BD-RRL) for bio-potential readout analog-front-end (AFE) amplifier. The proposed bio-potential readout AFE amplifier employs the GMCI $^{2}$ -DSL and BD-RRL to achieve low noise and significant total harmonic distortion (THD) with small ripple amplitude. A prototype has been taped out using a 0.18- $\mu$ m standard CMOS technology, and the core circuit occupies 880 $\mu$ m $\times$ 630 $\mu$ m. The mid-band gain is about 40 dB with a 1.3-V supply voltage, and the chip’s quiescent power is 10.8 $\mu$ W. The measured results show that the input-referred noise density is 26 nV/ $\surd$ Hz, and the input-referred integrated noise in the range from 0.5 Hz to 500 Hz is 0.93 $\mu$ $V_{rms}$ . The measured THD of a 5-m $V_{pp}$ input sinusoidal signal at 5.1 Hz is $-$ 64.3 dB without any input offset. The amplitude of residue ripple is achieved as 197.8 $\mu$ V around chopping frequency ( $f_{ch}$ ) by ripple suppression. High-fidelity and real-time electrocardiogram (ECG) signals are acquired.