Analysis and Design of a Novel Gain-Boosting Technique Based on Lossy Series Embedding Network for Near- $f_{max}$ Embedded Amplifier

This paper presents a novel gain-boosted structure to improve the power gain of near- $f_{max}$ amplifier, achieving a 185-GHz two-stage single-ended amplifier with a power gain of 6.85dB per-stage in a 65-nm CMOS process. Based on the interesting observation that the power gain is not sensitive to the loss in the 90 $^{\circ}$ transmission line which is used to provide dc path for the source terminal of a transistor to ground, a thorough theoretical gain-plane analysis is carried out. It is found that utilization of a lossy series embedding network with linear, lossless and reciprocal embedding networks can effectively boost the Mason’s $U$ and maximum available gain ( $G_{ma})$ in single-ended amplifiers and a novel $U$ -boosting factor is introduced to determine the condition whether $U$ of an active device can be boosted. Additionally, the gain-plane approach is also employed to conduct intuitive analyses of the power gain, stability, and output power characteristics of the proposed gain-boosting technique. Finally, based on the proposed gain-boosting technique, a two-stage 185-GHz amplifier is implemented in a 65nm CMOS process. The two-stage amplifier demonstrates a measured P $_{\mathrm{sat}}$ of $-$ 4.5-dBm and maximum PAE of 3.26% at 185-GHz, along with a maximum power gain of 13.7-dB.