A 12-Bit Voltage DAC Based on Dual 8-Bit Resistive Divider DACs

Jiaqi Fang, Xianjing Zou, Shuyan Luo, Ning Shang, Yizhou Huang,Meilin Wan

2023 5th International Conference on Circuits and Systems (ICCS)(2023)

引用 0|浏览0
暂无评分
摘要
A 12-bit voltage digital-to-analog converter (DAC) based on a dual 8-bit resistive divider DACs is proposed. The resistor ladder structure is used to achieve two 8-bit DACs. Then, analog addition, subtraction, multiplication, and division operations are performed on the outputs of the two 8-bit DACs, achieving a final 12-bit DAC output voltage. The circuit structure is simple, it only uses a total of 512 resistors, avoiding the problem of requiring a larger area and being susceptible to process mismatch as in traditional structures that use 4096 resistors. The proposed 12-bit voltage DAC is designed using HHGRACE 110nm process, and the entire area is $0.144\ \text{mm}^{2}$ . The post-simulation results show that, under typical process and temperature conditions, the simulated DNL is −0.17~0.13 LSB, INL is −0.06~0.23 LSB, SFDR is 87.7734 dB, and ENOB is 11.8604 bits.
更多
查看译文
关键词
Voltage DAC,Analog operation,Resistor,INL,DNL
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要