Design Considerations of Multi-Level 1S1R Cell for In-Memory Computing.

Jinshan Li,Zongwei Wang, Cuimei Wang,Yimao Cai,Ru Huang

2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)（2023）

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摘要

In this paper, we focus on the exploration of the multi-level 1S1R cell for in-memory computing (IMC). We develop Verilog-A behavior models for both the selector and resistive random-access memory (RRAM) to assess the influence of voltage shift, non-linearity, and selectivity on the performance of 1S1R-based IMC. Our study aims to provide guidance for integrating a multi-level 1S1R crossbar array for in-memory computing applications.

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关键词

selector,RRAM,model,in-memory computing

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