A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS.

Yukun He,Zhao Yuan, Kanan Wang,Renjie Tang, Yunxiang He,Dan Li ,Li Geng,Xiaoyan Gui

2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)(2023)

引用 0|浏览1
暂无评分
摘要
A 28/56 Gb/s NRZ/PAM-4 Dual-mode Transceiver (TRx) in a 28-nm CMOS process is presented. The quarter-rate transmitter (TX) incorporates a voltage-mode driver with a 4-tap feed forward equalizer (FFE). The half-rate receiver (RX) employs a continuous-time linear equalizer (CTLE), a 3-stage high-speed slicer and a digital clock and data recovery (CDR). A high-speed track-and-regenerate comparator is proposed to improve the settling time in the RX slicer. Measured results show that the TRx achieves 56 Gb/s maximum data rate with chip-on-board assembly. The TX and RX dissipate 125mW and 181.4mW power from a 0.9V supply, respectively.
更多
查看译文
关键词
transceiver (TRx),feed forward equalizer (FFE),clock and data recovery (CDR),continuous time linear equalizer (CTLE)
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要