An HBM3 Processing-In-Memory Architecture for Security and Data Integrity: Case Study

The von Neumann bottleneck is imposed due to the explosion of data transfers and emerging data-intensive applications in heterogeneous system architectures. The conventional computation approach of transferring data to CPU is no longer suitable especially with the cost it imposes. Hence, high-performance data processing mechanisms are needed, which may be demonstrated in bringing computation closer to data. Generating insight where data is stored helps deal with energy efficiency, low latency, storage bus bandwidth and security. In this paper, we explore near data processing focusing on Processing-In-Memory (PIM) to address data integrity through the inclusion of CRC compute units within the DRAM controller as well as address data security through encompassing an Advanced Encryption Standard (AES) acceleration unit. Our experimental results are based against an HBM3 platform. We achieved a computing memory with minimal overhead of commands, area and same power consumption compared to a non-computing one.