Competitive Failures Decoupling and Mechanisms Analysis of SiC MOSFET Module Under Power Cycling Stress

The chip-level degradation and packaging-level degradation of SiC MOSFET coupled and affected each other in the degradation process of the power cycling test (PCT). The degradation parameters monitored online are the result of the coupling action of multiple failure mechanisms. The degradation features are more complex to distinguish. In this work, the reliability issues of the SiC MOSFET module were investigated by PCT in saturation mode and body diode mode with the constant current and constant junction temperature swing (Delta T-j) control strategies. The failure sites and their underlying failure mechanisms were distinguished by comparing the trends of online precursors via monitoring the Kelvin source and common source with the help of static parameters and failure analysis. The relationship between failure mechanisms and the trends of online aging precursors of two monitoring positions was clarified based on the comprehensive analysis of chip and packaging-related failures. Besides, the competitive failure or interaction of chip-related and packaging-related degradation was discussed, which accelerated the failure of devices under tests (DUTs). Furthermore, the root cause of the difference in lifetime and failure modes under different PCT conditions was explored.