Intelligent Automatic Test Pattern Generation for Digital Circuits Based on Reinforcement Learning

Automatic Test Pattern Generation (ATPG) is a crucial technology in the testing of digital circuits. The excessive backtracks during the ATPG process can consume considerable computational resources and deleteriously affect performance. In this study, we introduce an intelligent ATPG method based on reinforcement learning to reduce the number of backtracks and enhance performance. Specifically, the Q-learning algorithm is employed to learn an optimal backtracing strategy pattern from the ATPG data produced through path-oriented decision-making (PODEM). The learned model is then utilized to guide the backtracing decisions within the PODEM, thereby improving the performance of the ATPG process. Experimental results demonstrate that, compared with traditional heuristic strategies and the backtrace path selection strategy based on artificial neural network (ANN), the proposed method can reduce backtrack occurrences and enhance performance more effectively.