Hardware/Software Coexploration for Hyperdimensional Computing on Network-on-Chip Architecture

IEEE Design & Test（2023）

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摘要

Editor’snotes: This article introduces a hardware/software coexploration framework based on neural architecture search, aimed at optimizing the deployment of hyperdimensional computing (HDC) on Network-on-Chip (NoC) architecture. —Mahdi Nikdast, Colorado State University, USA —Miquel Moreto, Barcelona Supercomputing Center, Spain —Masoumeh (Azin) Ebrahimi, KTH Royal Institute of Technology, Sweden —Sujay Deb, IIIT Delhi, India

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hyperdimensional computing,hardware/software,architecture,co-exploration,network-on-chip

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