A 12 GS/s RF-Sampler Employing Inductive Peaking with > 57 dB vertical bar THD vertical bar and > 49.3 dB SNDR in 22 nm FD-SOI CMOS

This paper presents a wide-band 12 GS/s RF-sampler layouted and simulated in 22nm FD-SOI CMOS. An RF-impedance matched FE-buffer drives the proposed track-and-hold circuit. Inductive peaking is utilized for the first time inside a track-and-hold to increase the bandwidth over 30% from initially 13.2 GHz to 17.4 GHz compared to the traditional track-and-hold. No time-interleaving is used, eliminating the need for calibration of gain/offset/sample-phase mismatches. The RF-sampler maintains a single-tone vertical bar THD vertical bar and SNDR of 57 dB and 49.3 dB, respectively, across the entire Nyquist band. Inductive peaking boosts the high-frequency SNR by 1.5 dB without consuming additional power. The simulated clock jitter is only 22 fs, which does not degrade the high-frequency SNR. A total power consumption of only 58mW is required from a 1.2V and 0.9V supply.