Off-State Current Degradation Behavior of Polycrystalline Silicon Thin-Film Transistors under Dynamic Drain Voltage Stress

In this work, the off-state current (I off ) degradation behavior of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under dynamic drain voltage stress is investigated for the first time. The I off degradation is dependent on the peak voltage, the duration of base voltage and the falling time, and independent of the duration of peak voltage and the rising time. Incorporating TCAD simulations, a degradation model based on the electric field is proposed. This work provides a new approach to understanding the degradation behavior of poly-Si TFTs operated under dynamic voltage stress.