PIMA-LPN: Processing-in-memory Acceleration for Efficient LPN-based Post-Quantum Cryptography

2023 60th ACM/IEEE Design Automation Conference (DAC)(2023)

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摘要
Learning parity with noise (LPN) is under intensive research in building advanced cryptography suites and protocols. However, in LPN-based cryptography, the transmission of the large matrices between the memory and the processor units generally incurs a significant latency overhead. In this work, we propose PIMA-LPN, a processing-in-memory (PIM) accelerator for LPN cryptography. Specifically, our PIM architecture can carry out the entire computations of LPN in memory. In this experiment, we demonstrate that PIMA-LPN can be 20.86× ~ 216.8× faster than existing CPU and FPGA implementations of LPN cryptography. Furthermore, we show that using PIMA-LPN, LPN cryptography can achieve similar computational efficiency compared to the post-quantum cryptography standard (i.e., CRYSTALS-Kyber) with 15.4x fewer memory units.
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关键词
Learning parity with noise (LPN),STT-MRAM,Cryptography,Processing-in-memory
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