Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory

Resistive random-access memory (RRAM), as an emerging memory, has a resistance difference between a high resistance state(HRS) and a low resistance state(LRS). It has received a lot of attention due to its large R-ratio (RHRS/RLRS), high density, and low power consumption. However, the wide resistance variation of RRAM makes it suffer from read errors due to the limited sensing margin. To improve the sensing margin and resistance to variations, this paper proposed a current sense amplifier (CSA) assisted with dynamic reference (DR-CSA) for RRAM. Compared with the conventional CSA, the proposed sense amplifier reduces the read latency and energy by up to 53% and 30%, respectively. Simulation results show that the proposed DR-CSA achieves a read latency of 0.84 ns for a 64Kb RRAM array with a reading current of 1 mu A at 1.1 V.