A Novel Wide Tuning Range Differential Ring Oscillator Application in Dynamically Stable and 1.17 s Lock Time CP-PLL Frequency Synthesizer

novel delay cell circuit for differential ring oscillator (DRO) with large tuning range along with application in charge pump phase lock loop (CP-PLL) frequency synthesizer has been presented in this paper. Using 0.18 μ m CMOS technology with power supply of 1.8 V, the two DRO architectures: 3-stage and 5-stage, were built and simulated. In both 3-stage and 5-stage DROs, single controlled voltage is employed. The suggested 3-stage and 5-stage DRO circuits generate a tuning range of 96.77 MHz - 5.296 GHz and 36.33 MHz - 2.803 GHz, respectively. The