28nm HKMG 1F-1R² Multilevel Memory for Inference Engine Application

Sourav De,Franz Mueller,Maximilian Lederer,Yannick Raffel,Tarek Ali,Luca Pirro,Stefan Duenkel,Sven Beyer,Konrad Seidel,Thomas Kaempfe

2023 INTERNATIONAL VLSI SYMPOSIUM ON TECHNOLOGY, SYSTEMS AND APPLICATIONS, VLSI-TSA/VLSI-DAT（2023）

引用 0|浏览12

暂无评分

摘要

This article reports 28 nm high-k-metal-gate (HKMG) based 3bits/cell memory with one ferroelectric (Fe) field effect transistor (FeFET) and one reconfigurable resistor (R-2). R-2, connected with the select line (SL) and the drain terminal of the FeFET, can be reconfigured via the SL terminal. R-2 can be implemented by using a standard metal-oxide-semiconductor field effect transistor (MOSFET) as voltage controlled resistor or any two terminal programmable resistors. The detailed discussion about R-2 is beyond the scope of this paper. The 1F-1R(2) cells demonstrate current-based 3bits/cell operation over a 300mm wafer and stable retention characteristics at 85 degrees C for all eight current levels.

查看译文

关键词

drain terminal,FeFET,ferroelectric field effect transistor,high-k-metal-gate,HKMG 1F-1R2 multilevel memory,inference engine application,reconfigurable resistor,select line,size 28.0 nm,size 300.0 mm,SL terminal,standard metal-oxide-semiconductor field effect transistor,temperature 85.0 degC,two terminal programmable resistors,voltage controlled resistor,word length 3.0 bit

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要

28nm HKMG 1F-1R2 Multilevel Memory for Inference Engine Application

28nm HKMG 1F-1R² Multilevel Memory for Inference Engine Application