Reformulating the FPGA Routability Prediction Problem with Machine Learning.

Field-Programmable Custom Compute technology is now commonplace in important commercial settings. This has primarily been driven by improvements in Field-Programmable Gate Array (FPGA) technology. Commercial use cases typically demand the implementation of complex designs on large FPGAs, increasing typical FPGA design compile times. In particular, the routing compilation step can take days to complete. Amplifying the negative impact of these long compilations is that FPGA users have no guarantee that compilation will be successful.