A 45nmlogictechnology Withhigh-K+metal GateTransistors, Strained Silicon, 9cuinterconnect Layers, 193nmdrypatterning, And100%pb-Free Packaging
K. Mistry, C. C. Allen,C. Auth, Brian Beattie,D. Bergstrom,M. Bost,M. Brazier, Markus J. Buehler,A. Cappellani,R. Chau, Changhwan Choi, G. Ding, K. Fischer,T. Ghani,R. Grover, Weihua Han, Dennis G. Hanken,M. Hattendorf,J. Hicks, R. Huessner,D. Ingerly, Pulkit Jain,R. James, Lee Soo Jong, Shalik Ram Joshi,C. Kenyon,Kelin J. Kuhn, Kyung Wook Lee, H. Liu,J. Maiz,B. McIntyre, Peter C. Moon,J. Neirynck,Sangwoo Pae,C. Parker,D. Parsons,C. Prasad, Leonard C. Pipes, M. B. Prince,P. Ranade, T.E. Reynolds,J. Sandford,L. Shifren,J. Sebastián, J. V. Seiple, Dan Simon,S. Sivakumar, P. Smith, Christopher W. Thomas,T. Troeger,P. Vandervoorn, Leonid Oliker,K. Zawadzki openalex（2007）
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