Thermal environment impact on HfO_x RRAM operation: A nanoscale thermometry and modeling study

As the demand for computing applications capable of processing large datasets increases, there is a growing need for new in-memory computing technologies. Oxide-based resistive random-access memory (RRAM) devices are promising candidates for such applications because of their industry readiness, endurance, and switching ratio. These analog devices, however, suffer from poor linearity and asymmetry in their analog resistance change. Various reports have found that the temperature in RRAM devices increases locally by more than 1000 K during operation. Therefore, temperature control is of paramount importance for controlling their resistance. In this study, scanning thermal microscopy is used to map the temperature of Au/Ti/HfOx/Au devices at a steady power state and to measure temperature dynamics of the top electrode above the filament location during both resistive switching loops and voltage pulsing. These measurements are used to verify the thermal parameters of a multiphysics finite elements model. The model is then used to understand the impact of thermal conductivities and boundary conductances of constituent materials on resistance change during the first reset pulse in RRAM devices. It is found that the resistance change can be reduced significantly when the temperature in the titanium capping layer is reduced. We find that the greatest temperature reduction and, therefore, the lowest resistance change in the device are afforded by capping layers with increased thermal conductivities. This work links thermal properties to the resistance change in RRAM devices, providing critical insights into engineering devices with improved switching dynamics.