Negative Impact of Approximated Signed Addition on Power Reduction

2023 International Symposium on Devices, Circuits and Systems (ISDCS)(2023)

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摘要
This paper presents evaluation results of a power- efficient JPEG compression circuit utilizing approximate computing. To achieve power efficiency, we replace summations in Discrete Cosine Transform (DCT) with approximate additions that follow Carry-Maskable Adder (CMA) [1]. We evaluate both the quality of the compressed images and the power consumed by the circuit. However, we observed unexpected results where power consumption increased despite the use of approximation, contradicting our expectations. Our detailed investigations revealed that the addition of negative values in 2's complement representation led to an increased wasted power consumption. Although reports on investigations related to power reduction through approximate computing offer valuable insights for researchers in this field, they are often difficult to find. This paper shows the reasons why power reduction could not be achieved in this specific case study.
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关键词
approximate computing,2's complement representation,image compression,DCT,low-power circuits
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