Solution processed low operating voltage SnO2 thin film transistor by using Li2SnO3/TiO2 stacked gate dielectric

A thin layer of sol–gel derived lithium stannate (Li2SnO3) was deposited by a spin coating method that shows high areal capacitance with low DC conductivity which originated due to the mobile lithium ion (Li+) and low carrier concentration. The DC conductivity of this Li2SnO3 thin film has been reduced further by adding a sol–gel derived titanium-oxide (TiO2) layer. Moreover, bilayer thin film effective areal capacitance also increases due to the higher relative permittivity of TiO2 layer. The measured areal capacitance of such Li2SnO3 /TiO2 bilayer thin films is 518 nF/cm2 with a low current density of 3.8 X 10-5 A/cm2 under 5 V external bias, can fulfil the requirement as gate dielectric of a low operating voltage (≤3V) thin film transistor (TFT). For identifying its applicability as gate insulator, a solution-processed tin oxide (SnO2) thin film transistor (TFT) was fabricated with Li2SnO3/TiO2 stacked gate dielectric. In this TFT structure, thin film of TiO2, SnO2 and Li2SnO3 are all polycrystalline in nature. The electrical characterization of TFT has been done under DC mode operation in ambient atmosphere measurement which remain almost unaltered under 11 cyclic measurements. The optimized TFT required only 3.0 V external bias that shows an electron mobility of 3.47 cm2 V−1 s−1 with on/off ratio of 50.