A compact adderless feed-forward incremental with multiple global references for CMOS image sensors

This paper presents an adderless feed-forward incremental (I ) with asynchronous SAR (ASAR) that removes the need for in-column calibration by using global references, eliminates an additional summing amplifier and reduces the conversion time by using a multi-bit ASAR quantizer. The proposed I ADC is designed in 40 nm CMOS technology and is laid out compactly in a 5 m × 466 m column. According to post-layout simulations, the ADC achieves an input-referred noise of 85 V _ rms , a conversion time of 3.2 s (with DCDS) and a power consumption of 230 W. This results in a Walden FoM _W of 234 fJ/conv.step and a FoM _A = FoM _W×A_ADC of 0.54 fJ · mm ^2 /conv.step, which demonstrates the feasibility of using the proposed architecture in CMOS image sensors.