A 99.93% energy-efficient switching scheme for SAR ADC without switching energy in the first three MSBs

This paper presents a highly energy-efficient and area-saving switching scheme for successive approximation register (SAR) analog-to-digital converters. By switching the voltages of all the bottom plates of capacitors in one side simultaneously by the same voltage level, the proposed switching scheme consumes no switching energy in the first three comparison cycles during which most of the switching energy is consumed. This switching method achieves a 99.93% reduction in switching energy and 97.6% less number of total capacitors over the conventional SAR switching scheme. In addition, the root mean square (RMS) of the maximum differential nonlinearity (DNL) and the maximum integral nonlinearity (INL) are 0.318 LSB and 0.32 LSB, respectively.