An Efficient External Memory Test Solution: Case Study for HPC Application

An increasing amount of data are being stored and processed by data centers every day for various commercial and industrial applications. For such large-scale systems dealing with enormous volumes of data, utilization of Dynamic Random-Access Memories (DRAM), integrated into horizontal or vertical stacks, has been proven to be the ideal solution in terms of area vs performance. At-speed test and repair in these stacks of DRAM memories requires complex solutions given the various lifecycle stages the memories go through. In this paper an efficient Built-In Self-Test (BIST) concept is proposed, focusing on both the in-system and production aspects of the test solution. It is demonstrated for a real-life High-Performance Computing (HPC) application.