Open-Source AXI4 Adapters for Chiplet Architectures

Growing use of heterogeneous integration to support emerging applications necessitates open-source PHY/MAC layer standard protocols. AXI4 has been adopted as a standard on-chip interconnect, making it ideal to enable seamless data transfer across chiplets. This paper presents the first open-source AXI4 Adapter that integrates with AIB2.0 to address D2D data transfer. An overview of clocking, flow control, and data-skew challenges posed by disaggregated chiplets is reviewed, followed by implementation, IP generation methodology, and verification results.