Implementation of 16 Boolean logic operations based on one basic cell of spin-transfer-torque magnetic random access memory

In-memory computing (IMC) systems based on emerging nonvolatile memories (NVMs) provide a thorough solution for memory wall issues and von Neumann bottlenecks. Massive IMC schemes have been proposed by utilizing ingenious structures and additional auxiliary components. However, these schemes are not compatible with the basic cell (one memory unit and one transistor) of emerging random-access memory (RAM), which goes against low-power and high-density requirements. In this paper, we propose a logic implementation scheme based on one magnetic tunnel junction and one transistor (1MTJ-1T), which is the basic cell of spin-transfer-torque magnetic RAM (STT-MRAM). With no other assistance, complete 16 logic operations can be accomplished in two steps with their logic outputs in-situ stored in the MTJ. The area (0.2 mu m(2)) and energy consumption per logic operation (1.1-2.6 pJ) of the logic gates under 14 nm process node are evaluated using SPICE simulations, indicating its excellent performance. Our work exhibits a 1MTJ-1T-based logic operation implementation, which can bridge the gap between STT-MRAM and high-performance IMC applications.