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Low-Power Data Streaming in Systolic Arrays with Bus-Invert Coding and Zero-Value Clock Gating.

2023 12th International Conference on Modern Circuits and Systems Technologies (MOCAST)(2023)

Cited 2|Views46
Key words
application-aware encoding approach,Bfloat16 arithmetic,bus-invert coding,data streaming,dynamic power consumption,high switching activity,local connections,low-power data streaming,matrix multiplications,pipelined data movement,pre-orchestrated data movements,processing elements pipelined array,state-of-the-art CNN,systolic array architectures,systolic arrays,zero-value clock gating
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