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A High-Resolution TDC Design Based on Multistep Fine Time Measurement by Utilizing Delay-Adjustable Looped Carry Chains on FPGAs.

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT(2023)

Cited 3|Views15
Key words
Delays,Delay lines,Time measurement,Clocks,Field programmable gate arrays,Costs,Multiplexing,Carry chain,field programmable gate array (FPGA),high linearity,multichannel TDC,ring oscillator (RO),time-to-digital converter (TDCs)
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