Surmounting Challenges in the Design of Low Power Real Time Clock IP for Advanced FinFET Technology Nodes

The Real Time Clock (RTC) IP is used in almost all electronic systems to maintain computer's time. RTC IP has a very tight specification on the current consumption in the power state when the IP is powered only by the Coin cell battery. One of the significant contributors to this current is the custom standard cell library present in the digital portion of the IP. In advanced FinFET technologies, because of inherent technology limitations and MOS behavior, the standard topologies used in the previous technologies do not work for the design of this library. This paper talks about a novel architecture for the design of this low-power standard cell library in advanced FinFET technologies. The RTC IP with the novel low-power standard cell library is already deployed in many SoCs and is also silicon proven.