Measurements of total ionizing dose effects in TPSCo 65 nm and influence of NMOS bulk bias

The CERN EP R & D WP 1.2 aims to develop state-of-art monolithic pixel detectors using modern CMOS processes. The TPSCo 65 nm process is a suitable candidate and its radiation tolerance and sensor performance are therefore being studied. The impact of the back bias on the transistor behavior has also been measured to provide the designers with accurate models. This process shows sensitivity to radiation and degradation mechanisms similar to previously studied 65 nm CMOS technologies, strongly dependent on the geometry of the transistors. This paper presents preliminary characterization results of this technology that can serve as a guideline for designers.