Development of Noise Tolerant Document Image Binarization Technique Employing an Accurate Square Root Circuit

Stochastic computing (SC) is a re-emerging paradigm that is inherently immune towards noise and shows low area and power implementation of conventional binary logic based approaches. A stochastic square root circuit is proposed, which shows faster convergence and less hardware area compared to the state-of-the-art methods and can be used for efficient real time implementation of various algorithms that employ the square root circuit. In this paper, the Nick’s binarization algorithm is introduced as a case study to identify its promise using various statistical metrics. This paper also introduces structural modifications of some of the basic stochastic circuits obeying certain boundary conditions. A squarer circuit requiring the least number of delay elements is calculated to reduce the hardware cost.