TCAD-Based RF performance prediction and process optimization of 3D monolithically stacked complementary FET

Radio frequency devices based on the state-of-the-art gate-all-around (GAA) nanosheet CFET process suffer from extra parasitic capacitance due to the stacked architecture compared to planar or FinFET devices. In this study, we first calibrate the TCAD process simulation model to experimental data. Subsequently, the model is applied to the simulation of RF characteristics of CFET devices with similar design as our real devices. Subsequently, the influence of various design parameters of the CFET structure are investigated, with emphasis on high frequency characteristics. The optimal design for CFET-based RF device is determined, which resulted in and fT and fMax improvements by 3.74 times and 8.44 times, respectively.