Analysis and Mitigation of DRAM Faults in Sparse-DNN Accelerators

Shamik Kundu,Arnab Raha,Suvadeep Banerjee,Suriyaprakash Natarajan,Kanad Basu

IEEE Design & Test（2023）

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摘要

Editor’s notes: This article analyzes the dynamic random-access memory (DRAM) faults in sparse deep neural network (DNN) accelerators and presents a systematic quality-aware mitigation strategy. —Fei Su, Intel Corporation

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关键词

Dynamic RAM,Sparse DNN Accelerator,Fault mitigation,Variable Retention Time,Reliability

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