A 28/38 GHz Dual-Band and Dual-Mode CMOS Power Amplifier Using Constant Optimal Load Impedance Method

This paper presents a 28/38 GHz dual-band and dual-mode power amplifier (PA) fabricated in a 90-nm CMOS process. With the proposed constant optimal load impedance (Z(opt)) method, this dual-mode PA can achieve the optimal power performance of both modes using the same matching circuit and improve the linear output power in low-power (LP) mode. In the high-power (HP) mode, the proposed PA demonstrates 23.1/16 dB small-signal gain, 18.4/17.5 dBm saturated output power (P-sat), 24.6/22.1% peak power-added efficiency (PAE(max)), 18.1/16.5 dBm output P-1dB (OP1dB) and 24.4/20.4% corresponding PAE (PAE(1dB)) at 28/38 GHz. In the LP mode, the proposed PA achieves 20.4/10.7 dB small-signal gain, 12.9/12.4 dBm P-sat, 12.4/9% PAE(max), 12.5/11.9 dBm OP1dB, 12.2/8.7% PAE(1dB) at 28/38 GHz.