RIMAC: An Array-level ADC/DAC-Free ReRAM-Based In-Memory DNN Processor with Analog Cache and Computation

2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC)(2023)

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摘要
By directly computing in analog domain, processing-in-memory (PIM) is emerging as a promising alternative to overcome the memory bottleneck of traditional von-Neuman architecture, especially for deep neural networks (DNNs). However, the data outside PIM macros in most existing PIM accelerators are stored and operated as digital signals that require massive expensive digital-to-analog (D/A) and analog-to-digital (A/D) converters. In this work, an array-level ADC/DAC-free ReRAM-based in-memory DNN processor named RIMAC is proposed, which accelerates various DNNs in pure analog-domain with analog cache and analog computation modules to eliminate the expensive D/A and A/D conversions. Our experiment result shows the peak energy efficiency is improved by about $34.8\times, 97.6\times, 10.7\times$ , and $14.0\times$ compared to PRIME, ISAAC, Lattice, and 21'DAC for various DNNs on ImageNet, respectively.
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In-Memory Computing,AI Circuit Design
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