A RISC-V-based Research Platform for Rapid Design Cycle.

Esteban Garzón,Roman Golman,Odem Harel,Tzachi Noy,Yehuda Kra, Asaf Pollock, Slava Yuzhaninov,Yonatan Shoshan,Yehuda Rudin,Yoav Weizman,Marco Lanuzza,Adam Teman

ISCAS（2022）

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摘要

This work proposes a novel platform for bringing a project from the concept to the tapeout stage in a short amount of time. An opensource and extendable RISC-V architecture is exploited to build a small area footprint core. This leads the research platform to be flexible in terms of design integration, while also allowing fast design cycles of research chips.

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关键词

area footprint core,design integration,fast design cycles,research chips,RISC-V-based research platform,rapid design cycle,tapeout stage,open-source,extendable RISC-V architecture

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