Experimental and Theoretical Analysis of Stateful Logic in Passive and Active Crossbar Arrays for Computation-in-Memory
2022 IEEE International Symposium on Circuits and Systems (ISCAS)（2022）
Key words
logic operation,Verilog-A model,logic gate,C2C variability,cycle-to-cycle variability,D2D variability,device-to-devic variability,memristive device reliability,memristive device variability,CIM,computation-in-memory,two terminals redox-based memristive devices,passive crossbar arrays,memristive switches,computing element,nonvolatile memory,active crossbar arrays,stateful logic
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