A Novel Array Programming Scheme for Large Matrix Processing in Flash-Based Computing-in-Memory (CIM) With Ultrahigh Bit Density

Computing-in-memory (CIM) architecture is a promising approach to breaking the bottleneck in von Neumann’ architecture. To shed light on large matrix operations in flash-based CIM with ultrahigh bit density (4–5 bit/cell), this work presents a novel incremental positive–negative step pulse programming (IPNPP) array programming scheme. The proposed scheme utilizes positive pulses for rough tuning and subsequent negative pulses for fine-tuning to cells’ threshold voltages. By adopting the IPNPP scheme in 55-nm NOR flash CIM arrays, it is shown that the latency and power consumption could be lowered effectively. As for image dehazing of ultrahigh-resolution images, ~180.6-TOPS/W high energy efficiency with great accuracy and variation tolerability has been demonstrated successfully. Our results indicate that the IPNPP is effective for CIMs that require high precision and low power consumption.