Advanced Substrate Packaging Technologies for Enabling Heterogeneous Integration (HI) Applications

With significantly rising demand in high performance computing (HPC), HI has become a crucial performance enabler in the microelectronics industry by providing the flexibility of die disaggregation, and the ability to mix/match different IP blocks optimized on different Si nodes in a single package. The key focus in HI scaling has been to push interconnect density with increased bandwidth and improved power efficiency. In this paper, we share the recent progress on Embedded Multi-Interconnect Bridge (EMIB) technology bump pitch scaling and discuss key considerations for advanced substrate packaging technologies to enable heterogeneous integration applications.