A 14-nm Low Voltage SRAM with Charge-Recycling and Charge Self-Saving Techniques for Low-Power Applications.

Keonhee Cho,Giseok Kim,Ji Sang Oh,Ki-Ryong Kim,Changsu Sim,Younmee Bae,Mijung Kim,Sangyeop Baeck,Taejoong Song,Seong-Ook Jung

Symposium on VLSI Technology (VLSI Technology)（2022）

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摘要

This paper presents charge-recycling and charge self-saving techniques in SRAM that lower V MIN while consuming minimal read and write energies. The proposed techniques (with flying CV SS ) achieve 250mV (270mV) V MIN improvements in 64-Kb SRAM using 0.080μm ² LV SRAM cell on 14-nm FinFET technology.

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关键词

charge-recycling,charge self-saving techniques,FinFET technology,low voltage SRAM,low-power applications,VMIN improvements,minimal read,write energies,flying CVSS,voltage 250.0 mV,voltage 270.0 mV,size 14 nm,storage capacity 64 Kbit

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