A 40-Gb/s, 900-fJ/bit Dual-Channel Receiver in a 45-nm Monolithic RF/Photonic Integrated Circuit Process

IEEE Solid-State Circuits Letters(2022)

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摘要
An energy-efficient dual-channel receiver (RX) for short-range optical interconnects is integrated in a 45-nm RF/photonic process and characterized for electrical bandwidth to de-embed the photonic device limitations. Each channel receiver consists of a low-power transimpedance amplifier (TIA), limiting amplifier (LA), and output buffer (OB) which is implemented with minimal area footprint using active gyrators and feedforward capacitive compensation for bandwidth enhancement and only a single pair of inductors on the OB. The electrical characterization includes the data rate and bit error rate (BER) to 40 Gb/s per channel. The total energy efficiency is 0.9 pJ/bit including the OB and 0.36 pJ/bit excluding the OB at a data rate of 40 Gb/s per channel.
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关键词
CMOS SOI,coherent receiver,energy efficient,optical receiver
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