Accelerating Garbage Collection of 3D Flash Memory via Exploiting Inter-Channel Parallelism
2022 IEEE 40th International Conference on Computer Design (ICCD)(2022)
摘要
3D flash memory relaxes the scaling constraints but unfortunately arouses the tedious garbage collection (GC) problem. We identify via an in-depth analysis that the root cause is the intra-channel relocation in conventional GC operations. We present ParaGC, an approach that strives to speed up the GC process via fully exploiting the inter-channel parallelism of 3D flash memory. ParaGC builds on two elementary designs: (i) relocation arrangement, which carefully determines the relocation traffic that each channel affords; and (ii) page assignment, which dispatches pages based on the access characteristic and the channel busyness. We implement ParaGC and conduct extensive experiments with ten real-world traces, showing that ParaGC can reduce 20.2-41.3% of the read latency, 24.3-38.8% of the write latency, and 51.5-75.8% of the GC latency.
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