Row Hammer Reduction Using a Buried Insulator in a Buried Channel Array Transistor
IEEE Transactions on Electron Devices（2022）
Key words
Insulators,Logic gates,Electric potential,Silicon,Random access memory,Junctions,Doping,Gate induced drain leakage (GIDL),off current (I-off),on current (I-on),partial isolation type buried channel array transistor (Pi-BCAT),potential drop width (PDW),row hammer effect (RHE)
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