Single-Phase PFC Rectifier With Integrated Flying Capacitor Power Pulsation Buffer

Single-phase Power Factor Correction (PFC) rectifiers with sinusoidal grid currents are inherently subject to an input power fluctuating at twice the mains frequency. In order to potentially mitigate bulky, heavy and failure-prone electrolytic dc-link capacitors, active Power Pulsation Buffer (PPB) concepts are proposed in the literature. For converter systems employing Flying Capacitor (FC) multilevel bridge-legs, the FCs can be utilized as a twice-mains frequency energy storage, i.e., as an integrated active PPB without the need for additional power components. Such ac-dc-stage-integrated FC PPBs capable of buffering the complete input power variation are known in literature which, however, require sophisticated control strategies with varying switching frequency and discontinuous conduction mode. This paper presents a novel ac-dc-stage-integrated FC-PPB approach which is compatible with standard PFC control concepts and enables a significant reduction in dc-link voltage variation. First, a control concept cycling the FC voltage in a wide range without interfering with the grid current controller is derived step by step and verified by means of circuit simulations. Design guidelines for the calculation of suitable FC capacitance values are presented and the limits in buffering capability are discussed. The concept is then experimentally verified with a 2.2 kW three-level FC single-phase PFC rectifier employing 600 V GaN power semiconductors where the dc-link voltage variation is reduced by 28% compared to conventional operation. Last, the applicability of the ac-dc-stage-integrated FC-PPB concept to other FC converter topologies is discussed.