A Compact Untrimmed 48ppm/°C All MOS Current Reference Circuit

2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS)(2022)

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摘要
An ultra-low power and low-cost (area efficient) nano-ampere current reference circuit designed in a 65 nm technology is presented in this paper: The proposed circuit is a resistorless beta multiplier current reference circuit that uses self cascode composite MOSFETs in triode region. Circuit analysis has been discussed in the paper. The simulated circuit consumes power of 550 nW at a nominal operating voltage of 1.33 V and occupies area of 0.0031 mm 2 . The design provides a line regulation of 1.9 %/V over an operating voltage range of 1.25 V to 1.4 V. Temperature coefficient (TC) of the circuit at nominal voltage of 1.33 V is 48 ppm/°C for a wide temperature range of −40°C to 85°C. Output current of the circuit at nominal voltage is 104.2 nA with a small process variation of only 4 %.
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关键词
Current reference,low-power,low temperature coefficient,self-cascode transistor,CMOS beta multiplier
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