Understanding ESD Characteristics of GGNMOS in Bulk FinFET Technology

Wen-Chieh Chen,Shih-Hung Chen,Geert Hellings,Thomas Chiarella, Jie Chen,Sujith Subramanian,Yong Kong Siew,Dimitri Linten,Guido Groeseneken

2020 42nd Annual EOS/ESD Symposium (EOS/ESD)（2020）

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摘要

Bulk FinFET is a main technology option for sub-20nm nodes. Device geometry and process options in advanced FinFET show effects on ESD performance. In this paper, the impacts of layout parameters of gate length and drain ballast distance on the grounded-gate NMOSFET (GGNMOS) are investigated and demonstrated by 3D TCAD simulation.

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关键词

3D TCAD simulation,grounded-gate NMOSFET,gate length,layout parameters,ESD performance,advanced FinFET,process options,main technology option,bulk FinFET technology,GGNMOS,ESD characteristics,size 20.0 nm

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