Model-based optimization of the energy efficiency of multi-threaded applications

Energy efficiency is considered to be a critical concern for modern hardware and a variety of hardware features have been developed to improve the energy balance for executing applications. This article focuses on the dynamic voltage frequency scaling (DVFS) technique, which is available for many platforms, including CPUs and GPUs. Analytical models for capturing the energy efficiency are considered and it is investigated whether such an analytical model is able to support an a priori selection of the operational frequency that leads to a near optimal energy consumption for the application code to be executed. Also the energy-delay product (EDP) is investigated, weighting the power against the square of execution time. The experimental evaluation is performed on the basis of the multi-threaded PARSEC benchmarks. We show that the operational frequency selected according to the analytical models leads to an energy consumption that is near the minimum energy consumption over all frequencies available.