A 112-Gb/s PAM-4 T/2-spaced 5-Tap FFE in 0.13-µm BiCMOS

2019 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)(2019)

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摘要
A 5-tap T/2-spaced 112-Gb/s Feed-Forward Equalizer (FFE) with four-level pulse-amplitude modulation (PAM-4) in a 0.13-µm BiCMOS process is presented. A number of bandwidth enhancement techniques are used, which allow high-speed operation while consuming 113.2 mW from a 1.8-V supply. The gain ripple of each delay tap is less than 1 dB up to 28 GHz to ensure low jitter. In addition, a 3-tap T-spaced 112-Gb/sPAM-4 FFE is designed and compared with this work to showcase the pronounced advantage of T/2-spaced FFE in PAM-4 equalization.
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关键词
FFE,PAM-4,current mode logic
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