Comparative analysis and robustness study of logic styles

This paper explores design of various components that are extensively used in digital circuits namely AND gate, OR gate, NAND gate, NOR gate and Full Adder using GDI Logic. Area and power dissipation of the circuits are one of the main issues encountered while fabrication of a chip. The design of AND gate, OR gate, NAND gate, NOR gate and Full Adder, which aims to solve these problems has been proposed in this paper. All the simulations are performed in SPICE using 32-nm CNTFET and results are tabulated showing comparison of circuit performance between Static, Domino, GDI and Transmission Gate (TG) Logic. The proposed GDI cell required 64