A 5-Gb/s PAM4 Voltage Mode Transmitter with Current Mode Continuous Time Linear Equalizer

Shraman Mukherjee,Sumantra Seth,Saurabh Saxena

2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)（2022）

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摘要

This work presents a 5 Gb/s PAM4 hybrid voltage-mode transmitter with current mode continuous-time linear equalization. The transmitter achieves a large output signal swing with a PAM4 CMOS output driver. CTLE is embedded in the transmitter’s output stage to compensate a range of channel loss without reducing the signal swing at the receiver front end. Fabricated in 65 nm CMOS process, the transmitter dissipates 20.4 mW in the output driver at 5 Gb/s while transmitting 1.1 V peak-to-peak differential output swing across 2 m UTP cable.

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关键词

output signal swing,PAM4 CMOS output driver,peak-to-peak differential output swing,current mode continuous time linear equalizer,PAM4 hybrid voltage-mode transmitter,current mode continuous-time linear equalization,CTLE,transmitter output stage,receiver front end,CMOS process,UTP cable,size 65.0 nm,power 20.4 mW,voltage 1.1 V,size 2.0 m,bit rate 5 Gbit/s

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